Ask
Login
TAGGED IN

Vlsi Design

Follow this tag to get notifications whenever a new post is added

ALL TAGS
3
votes
1
answer
3.4k
views
1
answer
Explain clock skew & describe techniques to minimize it
vlsi design updated 5.1 years ago by hetalgosavi • 1.6k
0
votes
1
answer
595
views
1
answer
Module 1 : Unit 1
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
763
views
1
answer
Module 1 : Unit 1
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
780
views
1
answer
MODULE 1 : UNIT 1
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
516
views
1
answer
Module 2 - Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
436
views
1
answer
Module 2 : Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
504
views
1
answer
Module 2 : Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
496
views
1
answer
Module 3 : Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
560
views
1
answer
Module 3 : Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
490
views
1
answer
Module 3 : Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
549
views
1
answer
Module 3 : Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
666
views
1
answer
Module 3 : Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
0
votes
1
answer
1.4k
views
1
answer
Module 3 : Unit 2
vlsi design updated 5.2 years ago by teamques10 ★ 65k
2
votes
1
answer
4.9k
views
1
answer
Explain clock generation techniques in integrated circuits
vlsi design updated 2.2 years ago by teamques10 ★ 65k
0
votes
1
answer
3.8k
views
1
answer
Compare NMOS & CMOS Technology in VLSI Design
vlsi design updated 2.2 years ago by sagarkolekar ★ 11k
0
votes
1
answer
3.4k
views
1
answer
Draw and explain AND gate using pass transistor logic.
vlsi design updated 2.2 years ago by sagarkolekar ★ 11k
0
votes
0
answers
904
views
0
answers
(Duplicate) What is ESD protection ? Explain in detail
vlsi design updated 2.2 years ago by sagarkolekar ★ 11k
0
votes
0
answers
873
views
0
answers
(Duplicate) Explain CMOS latchup & its prevention
vlsi design updated 2.2 years ago by sagarkolekar ★ 11k
0
votes
0
answers
901
views
0
answers
(Duplicate) Explain latchup in CMOS in detail
vlsi design updated 2.2 years ago by sagarkolekar ★ 11k
1
vote
1
answer
7.1k
views
1
answer
Compare Pass transistor logic, NMOS logic & CMOS logic
vlsi design updated 2.2 years ago by sagarkolekar ★ 11k
0
votes
0
answers
836
views
0
answers
(Duplicate) Explain different clock generation scheme
vlsi design updated 2.2 years ago by sagarkolekar ★ 11k
0
votes
1
answer
550
views
1
answer
Module 2 : Unit 2
vlsi design updated 23 months ago by sagarkolekar ★ 11k
7
votes
1
answer
40k
views
1
answer
Explain CMOS inverter characteristics mentioning all regions of operations
vlsi design updated 2.1 years ago by mkv030481 • 30
0
votes
1
answer
603
views
1
answer
VHDL program for half subtractor.
vlsi design updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
1
answer
837
views
1
answer
Module 2 : Unit 2
vlsi design updated 22 months ago by sagarkolekar ★ 11k
<prev • 129 results • page 2 of 6 • next >